HD74LV125A_15 Datasheet, PDF (4/12 Pages) Renesas Technology Corp – Quad. Bus Buffer Gates with 3-state Outputs

HD74LV125A
Pin Arrangement
1OE 1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND 7
14 V_CC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
(Top view)
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage range
V_CC
Input voltage range*¹
V_I
Output voltage range*^{1, 2}
V_O
Input clamp current
Output clamp current
Continuous output current
Continuous current through
V_CC or GND
Maximum power dissipation at
Ta = 25°C (in still air)*³
I_IK
I_OK
I_O
I_CC or I_GND
P_T
–0.5 to 7.0
–0.5 to 7.0
–0.5 to V_CC + 0.5
–0.5 to 7.0
–20
±50
±35
±70
785
500
V
V
V
Output: H or L
V_CC: OFF or Output: Z
mA
V_I < 0
mA
V_O < 0 or V_O > V_CC
mA
V_O = 0 to V_CC
mA
mW
SOP
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.3.00 Jun. 03, 2004 page 2 of 9