HD74LS280 Datasheet, PDF (4/6 Pages) Hitachi Semiconductor – 9-bit Odd/Even Parity Generators/Checkers

HD74LS280
Testing Method
Test Circuit
4.5V
P.G.
Zout = 50Ω
Input
V_CC Output
Load circuit 1
A
RL
B
Σ
C
even
D
CL
E
F
G
Output
H
Σ
odd
Same as Load Circuit 1.
I
Notes: 1. C_L includes probe and jig capacitance.
2. All diodes are 1S2074(H).
Waveform
t_TLH
t_THL
90%
90%
3V
Input
1.3 V
1.3 V
10%
10%
0V
t_PLH
t_PHL
In phase output
1.3 V
t_PHL
1.3 V
t_PLH
V_OH
V_OL
Out of phase output
1.3 V
1.3 V
V_OH
V_OL
Note: Input pulse; t_TLH ≤ 15 ns, t_THL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%.
Rev.3.00, Jul.15.2005, page 4 of 5