HD74LS280 Datasheet, PDF (1/6 Pages) Hitachi Semiconductor – 9-bit Odd/Even Parity Generators/Checkers

HD74LS280
9-bit Odd / Even Parity Generator / Checker
REJ03D0475–0300
Rev.3.00
Jul.15.2005
This parity generator / checker offers the designer a trade-off between reduced power consumption and high
performance. Although the HD74LS280 is implemented without expander inputs, the corresponding function is
provided by the availability of an input at pin 4 and the absence of any internal connection at pin 3.
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS280P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
PRSP0014DF-B
HD74LS280FPEL SOP-14 pin (JEITA)
(FP-14DAV)
FP
Notes: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Pin Arrangement
G1
Inputs
H2
NC 3
Input I 4
Σ
Outputs ^Even
5
Σ
Odd
6
GND 7
G
H
F
E
I
D
Σ Even C
Σ Odd _B
A
(Top view)
14 V_CC
13 _F
12 _E
11 _D
10 _C
Inputs
9B
8A
Function Table
Number of inputs A through I that are high
0, 2, 4, 6, 8
1, 3, 5, 7, 9
Σ Even
H
L
Outputs
Σ Odd
L
H
Rev.3.00, Jul.15.2005, page 1 of 5