HD74HC323 Datasheet, PDF (4/6 Pages) Hitachi Semiconductor – 8-bit Universal Shift/Storage Register (with 3-state Outputs)

HD74HC323
Switching Characteristics
Item
Symbol V_CC (V)
Maximum clock
frequency
f_max
2.0
4.5
6.0
Propagation delay tPLH
2.0
time
t_PHL
4.5
6.0
2.0
4.5
6.0
Output enable time t_ZH
2.0
t_ZL
4.5
6.0
Output disable
time
t_HZ
2.0
t_LZ
4.5
6.0
Output rise/fall
time
t_TLH
2.0
t_THL
4.5
6.0
2.0
4.5
6.0
Input capacitance Cin
—
Ta = 25°C
Min Typ Max
—— 5
— — 27
— — 31
— — 150
— 18 30
— — 26
— — 175
— 20 35
— — 30
— — 150
— 14 30
— — 26
— — 150
— 15 30
— — 26
— — 75
— 5 15
— — 13
— — 60
— 4 12
— — 10
— 5 10
(C_L = 50 pF, Input t_r = t_f = 6 ns)
Ta = –40 to +85°C
Unit
Min
Max
Test Conditions
—
4 MHz
—
21
—
24
—
190 ns Clock to Q_A’ or Q_H’
—
38
—
33
—
220 ns Clock to Q
—
44
—
37
—
190 ns
—
38
—
33
—
190 ns
—
38
—
33
—
95
ns Q_A’, Q_H’
—
19
—
16
—
75 ns Q
—
15
—
13
—
10 pF
Test Circuit
VCC
VCC
G₁
Output
Input
Pulse Generator
G₂
G
A/Q_A
S₁ ^{to H/QH}
Zout = 50 Ω
S₀
Output
1 k Ω _S1
C_L =
50 pF
OPEN
GND
V_CC
Input
Pulse Generator
Zout = 50 Ω
S_R
Clock
SL
Clear
Q_A'
Output C_L =
50 pF
Q_H'
C_L =
50 pF
TEST
t_PLH / t _PHL
t_ZH/ t _HZ
t_ZL / t _LZ
S1
OPEN
GND
V_CC
Note : 1. C_L includes probe and jig capacitance.
Rev.2.00 Jan 31, 2006 page 4 of 5