HD74CBT1G125_15 Datasheet, PDF (4/7 Pages) Renesas Technology Corp – Single FET Bus Switch

HD74CBT1G125
Switching Characteristics
V_CC = 4.0 V
(Ta = −40 to 85°C)
Item
Symbol Min
Propagation delay time ^{*1 tPLH}
⎯
t_PHL
Enable time
t_ZH
⎯
t_ZL
Disable time
t_HZ
⎯
t_LZ
⎯
Max
0.35
5.5
4.5
4.5
Unit
ns
ns
ns
Test conditions
C_L = 50 pF
R_L = 500 Ω
C_L = 50 pF
R_L = 500 Ω
C_L = 50 pF
R_L = 500 Ω
FROM
(Input)
A or B
OE
OE
TO
(Output)
B or A
A or B
A or B
V_CC = 5.0±0.5 V
Item
Symbol Min
Max
Unit
Test conditions
FROM
TO
(Input)
(Output)
Propagation delay time ^{*1 tPLH}
t_PHL
⎯
0.25
ns
C_L = 50 pF
R_L = 500 Ω
A or B
B or A
Enable time
t_ZH
t_ZL
1.6
4.9
ns
C_L = 50 pF
R_L = 500 Ω
OE
A or B
Disable time
t_HZ
t_LZ
1.0
4.2
1.0
4.8
ns
C_L = 50 pF
R_L = 500 Ω
OE
A or B
Note: 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and
the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
Test Circuit
S1
500 Ω
*1
CL = 50 pF
500 Ω
See under table
OPEN
GND
Load circuit for outputs
Symbol S1
t_PLH / t_PHL
t_ZH / t_HZ
t_ZL / t_LZ
OPEN
OPEN
7V
Note: 1. CL includes probe and jig capacitance.
R04DS0015EJ0200 Rev.2.00
Jan 10, 2014
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