HD49335F_15 Datasheet, PDF (4/32 Pages) Renesas Technology Corp – CDS/PGA & 10-bit A/D TG Converter

HD49335F/HF
Pin Arrangement
AV_DD
BLKC
CDS_in
AV_DD
BLKFB
BLKSH
AV_SS
Test2
Test1
DLL_C
DV_DD1
MON
41cont
CS
SDATA
SCK
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
49
32
50
31
51
30
52
29
53
28
54
27
55
26
56
25
57
24
58
23
59
22
60
21
61
20
62
19
63
18
64
17
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
XV3
XV2
XV1
DV_DD3
DV_DD4
1/4clk_o
H2A
DV_SS4
DV_SS4
1/2clk_o
H1A
DV_DD4
DV_DD3
RG
Reset
VD_in
(Top view)
Pin Description
Pin No.
1
2
3 to 12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
Symbol
ID
DVSS1,2
D0 to D9
DVDD2
DVSS3
CLK_in
HD_in
VD_in
Reset
RG
DVDD3
DVDD4
H1A
1/2clk_o
DVSS4
DVSS4
H2A
1/4clk_o
DVDD4
DVDD3
Description
Odd/even number line detecting pulse output pin
CDS Digital ground + ADC output buffer ground (0 V)
Digital output (D0; LSB, D9; MSB)
ADC output buffer power supply (3 V)
General ground for TG (0 V)
CLK input (max 72 MHz)
HD input
VD input
Hardware reset (for DLL reset)
Reset gate pulse output
General power supply for TG (3 V)
H1 buffer power supply (3 V)
H.CCD transfer pulse output-1A
CLK_in 2 divided output. 3 divided output at 3 divided mode
H1 buffer ground (0 V)
H1 buffer ground (0 V)
H.CCD transfer pulse output-2A
CLK_in 4 divided output. 6 divided output at 3 divided mode
H2 buffer power supply (3 V)
General power supply for TG (3 V)
Rev.1.0, Feb.25.2004, page 2 of 29
Analog(A) or
I/O Digital(D)
Remarks
OD
2 mA/10 pF
—D
OD
2 mA/10 pF
—D
—D
ID
I/O D
I/O D
ID
Schmitt trigger
OD
3 mA/10 pF
—D
—D
OD
30 mA/165 pF
OD
2 mA/10 pF
—D
—D
OD
30 mA/165 pF
OD
2 mA/10 pF
—D
—D