3SK323 Datasheet, PDF (4/8 Pages) Renesas Technology Corp – Si Nch Dual Gate MOS FET UHF RF LOW NOISE Amplifier

3SK323
Gain Reduction vs.
40
Gate2 to Source Voltage
I_D = 10 mA (start)
35
f = 900 MHz
30
25
20
15
10
5V
5
VDS = 3.5 V
0
0
1
2
3
4
Gate2 to Source Voltage V_G2S (V)
Gate2 to Source Voltage vs.
Power Gain, Noise Figure
30
3.0
PG
20
2.0
NF
10
1.0
VDS = 3.5 V
I_D = 10 mA (start)
0
f = 900 MHz
0.0
1.0
1.5
2.0
2.5
3.0
Gate2 to Source Voltage V_G2S (V)
Maximum Stable Gain vs. Drain Current
30
5V
25
20
V_DS = 3.5 V
15
10
5
V_G2S = 3.0 V
0
f = 900 MHz
0
5
10
15
20
Drain Current I_D (mA)
Drain Current vs.
Power Gain, Noise Figure
30
3.0
PG
20
2.0
NF
10
1.0
V_DS = 3.5 V
VG2S = 3.0 V
f = 900 MHz
0
0
5
10
15
Drain Current I_D (mA)
0.0
20
Drain to Source Voltage vs.
Power Gain, Noise Figure
30
3.0
PG
20
2.0
NF
10
1.0
V_G2S = 3.0 V
I_D ≅ 10 mA
f = 900 MHz
0
0.0
1
2
3
4
5
Drain to Source Voltage V_DS (V)
Maximum Stable Gain vs. Drain Current
30 _{VG2S = 3.0 V}
f = 2 GHz
25
20
15
5V
10
5
V_DS = 3.5 V
0
0
5
10
15
20
Drain Current I_D (mA)
Rev.1.00, May 18,2005, page 4 of 7