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M30218_01 Datasheet, PDF (341/469 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER
A-D Converter
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.8 A-D Converter
2.8.1 Overview
The A-D converter used in the M30218 group operates on a successive conversion basis. The following
is an overview of the A-D converter.
(1) Mode
The A-D converter operates in one of five modes:
(a) One-shot mode
Carries out A-D conversion on input level of one specified pin only once.
(b) Repetition mode
Repeatedly carries out A-D conversion on input level of one specified pin.
(c) One-shot sweep mode
Carries out A-D conversion on input level of two or more specified pins only once.
(d) Repeated sweep mode 0
Repeatedly carries out A-D conversion on input level of two or more pins.
(e) Repeated sweep mode 1
Repeatedly carries out A-D conversion on input level of two or more pins. This mode is different from
the repeated sweep mode 0 in that weights can be assigned to specifing pins control the number of
conversion times.
(2) Operation clock
The operation clock can be selected from the following: fAD, divide-by-2 fAD, and divide-by-4 fAD. The
fAD frequency is equal to that of the CPU’s main clock.
(3) Conversion time
Number of conversion for A-D convertor varies depending on resolution as given. Table 2.8.1 shows
relation between the A-D converter operation clock and conversion time.
Sample & Hold function selected:
33 cycles for 10-bit resolution, or 28 cycles for 8-bit resolution
No Sample & Hold function:
59 cycles for 10-bit resolution, or 49 cycles for 8-bit resolution
Table 2.8.1. Conversion time every operation clock
Frequency selection bit 1
Frequency selection bit 0
0
A-D converter's operation clock
φAD =
fAD
4
0
1
φAD =
fAD
2
Min. conversion
cycles (Note 1)
8-bit mode
10-bit mode
28 X φAD
33 X φAD
Min. conversion
time (Note 2)
8-bit mode
10-bit mode
11.2µs
13.2µs
Note 1: The number of conversion cycles per one analog input pin.
Note 2: The conversion time per one analog input pin (when fAD = f(XIN) = 10 MHz)
5.6µs
6.6µs
326
1
Invalid
φAD = fAD
2.8µs
3.3µs