7641 Datasheet, PDF (32/138 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

7641 Group
UART1, UART2
The UART consists of two channels: UART1 and UART2. Each
has a dedicated timer provided to generate transfer clocks and op-
erates independently. Both UART1 and UART2 have the same
functions.
Twelve serial data transfer formats can be selected, and the trans-
fer formats used by a transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer, but the
two buffers have the same address in a memory. Since the shift
register cannot be written to or read from directly, transmit data is
written to the transmit buffer register, and receive data is read
from the receive buffer register.
The transmit buffer register can also hold the next data to be
transmitted, and the receive buffer register can hold a character
while the next character is being received.
The transfer speed (baud rate) is expression as follows:
Transfer speed (baud rate) = fi / {(n + 1) ✕ 16 }
n: The contents of UARTx (x = 1, 2) baud rate generator
fi: Using UART clock prescaling select bits, select any one of φ, φ/
8, φ/32, φ/256, SCSGCLK, SCSGCLK/8, SCSGCLK/32 and
SCSGCLK/256
Data bus
Addresses 003516 003416
Addresses 003D16 003C16
OER
UART character length select bits
P85/URXD1
P81/URXD2/SCLK
ST
detector
7 bits
8 bits
Receive buffer register 1
Receive buffer register 2
Receive shift register 1
Receive shift register 2
9 bits
PER FER SPdetector
UARTx mode register
Address 003016
Address 003816
Receive buffer full flag (RBF)
Receive buffer full interrupt request (UxRBF)
Receive summing error interrupt request (UxES)
Address 003316
Address003B16
UARTx control register
Clock control circuit
P87/RTS1
P83/RTS2/STXD
φ
SCSGCLK
P86/CTS1
P82/CTS2/SRXD
P84/UTXD1
P80/UTXD2/SRDY
RTS control register ^{Addresses 003616}
Addresses 003E16
Frequency
UART clock
select bit
Prescaler
1/1
Addresses 003116 division ratio
Addresses 003916 1/(n+1)
1/8
1/32
1/256
Baud rate generator
1/16
ST/SP/PA generator
UART clock
prescaling select bits
Transmit comple flag
(TCM)
Transmit shift register 1
Transmit shift register 2
Transmit interrupt source select bit
Transmit interrupt
Character length select bit
request (UxTX)
Transmit buffer register 1
Transmit buffer register 2
Transmit buffer empty
UART status register ^{flag (TBE)}
Addresses 003516 003416
Addresses 003D16 003C16
Address 003216
Address 003A16
Data bus
Fig. 26 UARTx (x = 1, 2) block diagram
Rev.4.00 Aug 28, 2006 page 32 of 135
REJ03B0191-0400