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M32C86 Datasheet, PDF (314/505 Pages) Renesas Technology Corp – RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
M32C/86 Group (M32C/86, M32C/86T)
22. Intelligent I/O (Communication Function)
SI/O Communication Mode Register 0
b7 b6 b5 b4 b3 b2 b1 b0
00 0
Symbol
G0MR
Address
00ED16
After Reset
0016
Bit
Symbol
Bit Name
Function
RW
GMD0
GMD1
Communication Mode
Select Bit
b1 b0
RW
0 1 : Clock synchronous serial I/O
mode
1 1 : HDLC data processing mode(1) RW
Internal/External Clock 0 : Internal clock
CKDIR Select Bit
1 : External clock
RW
Reserved Bit
Set to "0"
RW
(b5 - b3)
UFORM
Transfer Format
Select Bit
0 : LSB first
1 : MSB first
RW
IRS Transmit Interrupt
Cause Select Bit
0 : No data in the G0TB register
(TI=1)
RW
1 : Transmission is completed
(TXEPT=1)
NOTES:
1. Do not set to any bit combinations except the above.
SI/O Communication Mode Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
G1MR
Address
012D16
After Reset
0016
Bit
Symbol
GMD0
GMD1
CKDIR
Bit Name
Communication Mode
Select Bit
Internal/External Clock
Select Bit
Function
RW
b1 b0
0 0 : UART mode
RW
0 1 : Clock synchronous serial I/O
mode
1 0 : Special communication mode(1) RW
1 1 : HDLC data processing mode
0 : Internal clock
1 : External clock
RW
Stop Bit Length
0 : 1 stop bit
STPS Select Bit
1 : 2 stop bits
RW
PRY Parity Odd/Even
0 : Odd parity
RW
Select Bit
1 : Even parity
Parity Enable
0 : Parity disabled
PRYE Select Bit
1 : Parity enabled
RW
Transfer Format
0 : LSB first
UFORM Select Bit
1 : MSB first
RW
NOTES:
IRS Transmit Interrupt
Cause Select Bit
0 : No data in the G1TB register
(TI=1)
RW
1 : Transmission is completed
(TXEPT=1)
1. In M32C/86, do not set the GMD1 and GMD0 bits to "102" except when using in motor vehicles.
Figure 22.22 G0MR and G1MR Registers
Rev. 1.00 Sep. 08, 2005 Page 291 of 479
REJ09B0204-0100