H8S2615 Datasheet, PDF (304/479 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

• HCAN monitor register (HCANMON)
11.3.1 Master Control Register (MCR)
MCR controls the HCAN.
Initial
Bit Bit Name Value
R/W
Description
7
MCR7
0
R/W
HCAN Sleep Mode Release
When this bit is set to 1, the HCAN automatically
exits HCAN sleep mode on detection of CAN bus
operation.
6

0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
5
MCR5
0
R/W
HCAN Sleep Mode
When this bit is set to 1, the HCAN transits to HCAN
sleep mode. When this bit is cleared to 0, HCAN
sleep mode is released.
4, 3 
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
2
MCR2
0
R/W
Message Transmission Method
0: Transmission order determined by message
identifier priority
1: Transmission order determined by mailbox (buffer)
number priority (TXPR1 > TXPR15)
1
MCR1
0
R/W
Halt Request
When this bit is set to 1, the HCAN transits to HCAN
HALT mode. When this bit is cleared to 0, HCAN
HALT mode is released.
Rev. 2.00, 05/04, page 270 of 442