M32C8B Datasheet, PDF (296/406 Pages) Renesas Technology Corp – RENESAS MCU M16C FAMILY / M32C/80 SERIES

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change.
M32C/8B Group
22. Programmable I/O Ports
22. Programmable I/O Ports
123 programmable I/O ports, P0 to P15 (excluding P8_5), are available in the 144-pin package. 87 programmable I/O
ports, P0 to P10 (excluding P8_5), are available in the 100-pin package. The Port Pi Direction Registers determine
individual port status, input or output. The pull-up control registers determine whether the ports, divided into groups of
four, are pulled up or not. P8_5 is an input-only port and cannot be pulled up internally. The P8_5 bit in the P8 register
indicates an NMI input level since P8_5 shares its pin with NMI.
Figures 22.1 to 22.4 show programmable I/O port configurations.
Each pin functions as a programmable I/O port, I/O pin for internal peripheral function, or bus control pin.
To use as an I/O pin for peripheral function, refer to the description for individual peripheral functions. Refer to 8. Bus
when used as a bus control pin.
Registers associated with the programmable I/O ports are as follows.
22.1 Port Pi Direction Register (PDi Register, i = 0 to 15)
Figure 22.5 shows the PDi register.
The PDi register configures a programmable I/O port as either input or output. Each bit in the PDi register
corresponds to one port.
In memory expansion mode and microprocessor mode, the PDi register corresponding to the following bus control
pins cannot be written: A0 to A22, A23, D0 to D15, CS0 to CS3, WRL / WR, WRH / BHE, RD, BCLK / ALE /
CLKOUT, HLDA / ALE, HOLD, ALE, and RDY. No bit controlling P8_5 is provided in the PDi register.
22.2 Port Pi Register (Pi Register, i = 0 to 15)
Figure 22.6 shows the Pi register.
The MCU inputs/outputs data from/to external devices by reading and writing to the Pi register. The Pi register
consists of a port latch to hold output data and a circuit to read the pin level. Each bit in the Pi register corresponds
to one port.
In memory expansion mode and microprocessor mode, the Pi register corresponding to the following bus control
pins cannot be written and the port level cannot be read from the Pi register: A0 to A22, A23, D0 to D15, CS0 to
CS3, WRL/ WR, WRH / BHE, RD, BCLK / ALE / CLKOUT, HLDA / ALE, HOLD, ALE, and RDY.
22.3 Function Select Register A (PSj Register, j = 0 to 3)
Figures 22.7 to 22.8 show the PSj registers.
The PSj register selects either I/O port or peripheral function output if these functions share a single pin (excluding
DA0 and DA1).
When multiple peripheral function outputs are assigned to a single pin, set registers PSL0 to PSL3, and PSC to
select which function to use.
Tables 22.3 to 22.7 list peripheral function output control settings for each pin.
22.4 Function Select Register B (PSLk Register, k = 0 to 3)
Figures 22.9 to 22.10 show the PSLk register.
When multiple peripheral function outputs are assigned to a single pin, the PSLk register selects which peripheral
function output to use.
Refer to 22.8 Analog Input and Other Peripheral Function Input for information on bits PSL3_3 to PSL3_6 in
the PSL3 register.
22.5 Function Select Register C (PSC Register)
Figure 22.11 shows the PSC register.
When multiple peripheral function outputs are assigned to a single pin, the PSC register selects which peripheral
function output to use.
Refer to 22.8 Analog Input and Other Peripheral Function Input for information on the PSC_7 bit in the PSC
register.
REJ09B0450-0050 Rev.0.50 Oct 31, 2008
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