H836109 Datasheet, PDF (276/622 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Tiny Series

Section 13 Timer RC
Figure 13.8 shows an example of buffer operation when GRA is set as an input-capture register
and GRC is set as the buffer register for GRA. TRCCNT functions as a free-running counter and
is captured at both rising and falling edges of the FTIOA signal. Due to the buffer operation, the
GRA value is transferred to GRC on an input-capture A and the TRCCNT value is stored in GRA.
TRCCNT
H'FFFF
H'DA91
H'5480
H'0245
H'0000
FTIOA
Time
GRA
GRC
H'0245
H'5480
H'0245
H'DA91
H'5480
Figure 13.8 Buffer Operation Example (Input Capture)
Rev. 1.50 Sep. 18, 2007 Page 242 of 584
REJ09B0240-0150