OPA2673 Datasheet, PDF (27/40 Pages) Texas Instruments – Dual, Wideband, High Output Current Operational Amplifier with Active Off-Line Control

OPA2673
www.ti.com..................................................................................................................................................... SBOS382A – JUNE 2008 – REVISED OCTOBER 2008
values used in the Typical Characteristics are also
correcting for board parasitic not considered in the
simplified analysis leading to Equation 15. The values
shown in Figure 83 give a good starting point for
designs where bandwidth optimization is desired.
600
500
400
300
200
0
5
10
15
20
Noise Gain
Figure 83. Feedback Resistor vs Noise Gain
The total impedance going into the inverting input
may be used to adjust the closed-loop signal
bandwidth. Inserting a series resistor between the
inverting input and the summing junction increases
the feedback impedance (the denominator of
Equation 14), decreasing the bandwidth. The internal
buffer output impedance for the OPA2673 is slightly
influenced by the source impedance coming from of
the noninverting input terminal. High-source resistors
also have the effect of increasing R_I, decreasing the
bandwidth. For those single-supply applications that
develop a midpoint bias at the noninverting input
through high valued resistors, the decoupling
capacitor is essential for power-supply ripple
rejection, noninverting input noise current shunting,
and to minimize the high-frequency value for R_I in
Figure 82.
Output Current and Voltage
The OPA2673 provides output voltage and current
capabilities that are unsurpassed in a low-cost dual
monolithic op amp. Under no-load conditions at
+25°C, the output voltage typically swings closer than
1.1V to either supply rail; the tested (+25°C) swing
limit is within 1.2V of either rail. Into a 4Ω load (the
minimum tested load), it delivers more than ±460mA.
The specifications described previously, though
familiar in the industry, consider voltage and current
limits separately. In many applications, it is the
voltage times current (or V-I product) that is more
relevant to circuit operation. Refer to the Output
Voltage and Current Limitations plot in the Typical
Characteristics (Figure 6). The X- and Y-axes of this
graph show the zero-voltage output current limit and
the zero-current output voltage limit, respectively. The
four quadrants give a more detailed view of the
OPA2673 output drive capabilities, noting that the
graph is bounded by a safe operating area of 2W
maximum internal power dissipation (in this case, for
one channel only). Superimposing resistor load lines
onto the plot shows that the OPA2673 can drive ±4V
into 10Ω or ±45V into 25Ω without exceeding the
output capabilities or the 2W dissipation limit. A 100Ω
load line (the standard test circuit load) shows the full
±4.8V output swing capability, as stated in the
Electrical Characteristics table. The minimum
specified output voltage and current over temperature
are set by worst-case simulations at the cold
temperature extreme. Only at cold startup do the
output current and voltage decrease to the numbers
shown in the Electrical Characteristics table. As the
output transistors deliver power, the junction
temperatures increase, decreasing the V_BEs
(increasing the available output voltage swing), and
increasing the current gains (increasing the available
output current). In steady-state operation, the
available output voltage and current is always greater
than that shown in the over-temperature
specifications because the output stage junction
temperatures is higher than the minimum specified
operating ambient.
Driving Capacitive Loads
One of the most demanding and yet very common
load conditions for an op amp is capacitive loading.
Often, the capacitive load is the input of an
analog-to-digital converter (ADC)—including
additional external capacitance that may be
recommended to improve the ADC linearity. A
high-speed, high open-loop gain amplifier such as the
OPA2673 can be very susceptible to decreased
stability and closed-loop response peaking when a
capacitive load is placed directly on the output pin.
When the amplifier open-loop output resistance is
considered, this capacitive load introduces an
additional pole in the signal path that can decrease
the phase margin. Several external solutions to this
problem have been suggested.
When the primary considerations are frequency
response flatness, pulse response fidelity, and/or
distortion, the simplest and most effective solution is
to isolate the capacitive load from the feedback loop
by inserting a series isolation resistor between the
amplifier output and the capacitive load. This
approach does not eliminate the pole from the loop
response, but rather shifts it and adds a zero at a
higher frequency. The additional zero acts to cancel
the phase lag from the capacitive load pole, thus
increasing the phase margin and improving stability.
The Typical Characteristics show the Differential R_S
vs Capacitive Load (Figure 27) and the resulting
frequency response at the load. Parasitic capacitive
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