H83802_10 Datasheet, PDF (267/546 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family / H8/300L Super Low Power Series

Program processing
Section 9 Timers
Interrupt request
flag clear
2
Interrupt request
flag clear
Interrupt
Interrupt
Normal
φw
Interrupt source generation
signal (internal signal,
nega-active)
Overflow signal, compare
match signal (internal signal,
nega-active)
Interrupt request flag
(IRRTFH, IRRTFL)
1
Figure 9.6 Clear Interrupt Request Flag when Interrupt Source Generation Signal Is Valid
Timer Counter (TCF) Read/Write: When φ_W/4 is selected as the internal clock in active (high-
speed, medium-speed) mode, write on TCF is impossible. And when reading TCF, as the system
clock and internal clock are mutually asynchronous, TCF synchronizes with synchronization
circuit. This results in a maximum TCF read value error of ±1.
When reading or writing TCF in active (high-speed, medium-speed) mode is needed, please select
the internal clock except for φ_W/4 before read/write is performed.
In subactive mode, even if φ_W /4 is selected as the internal clock, TCF can be read from or written
to normally.
Rev. 7.00 Mar. 08, 2010 Page 235 of 510
REJ09B0024-0700