R8C2G Datasheet, PDF (264/344 Pages) Renesas Technology Corp – MCU

R8C/2G Group
20. Flash Memory
20. Flash Memory
20.1 Overview
Rewrite operations to the flash memory can be performed in three modes: CPU rewrite, standard serial I/O, and
parallel I/O.
Table 20.1 lists the Flash Memory Performance (refer to Table 1.1 Specifications for R8C/2G Group for items
not listed in Table 20.1).
Table 20.1 Flash Memory Performance
Item
Flash memory operating mode
Division of erase block
Programming method
Erase method
Programming and erasure control method
Protection method
Number of commands
Programming and Blocks 0 and 1 (program
erasure endurance^{(1) ROM)}
Programming and erasure voltage
ID code check function
ROM code protect
Specification
3 modes (CPU rewrite, standard serial I/O, and parallel I/O)
Refer to Figure 20.1
Byte unit
Block erase
Program and erase control by software command
Program ROM protection by FMR0 register
5 commands
100 times
VCC = 2.7 to 5.5 V
Standard serial I/O mode supported
Parallel I/O mode supported
NOTE:
1. Definition of programming and erasure endurance.
The programming and erasure endurance is defined on a per-block basis.
Table 20.2 Flash Memory Rewrite Modes
Flash Memory
Rewrite Mode
Function
Areas which can
be rewritten
Rewrite Program
CPU Rewrite Mode
Standard Serial I/O Mode
Parallel I/O Mode
User ROM area is rewritten User ROM area is rewritten User ROM area is rewritten
by executing software
by a dedicated serial
by a dedicated parallel
commands from the CPU. programmer.
programmer.
User ROM area
User ROM area
User ROM area
User program
Standard boot program –
Rev.1.00 Apr 04, 2008 Page 244 of 318
REJ09B0387-0100