R8C-26_1 Datasheet, PDF (261/485 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/26 Group, R8C/27 Group
15. Serial Interface
UARTi Bit Rate Register (i = 0 or 1)^{(1, 2, 3)}
b7
b0
Symbol
U0BRG
U1BRG
Address
00A1h
00A9h
After Reset
Undef ined
Undef ined
Function
Setting Range
RW
Assuming the set value is n, UiBRG divides the count source by n+1
00h to FFh
WO
NOTES:
1. Write to this register w hile the serial I/O is neither transmitting nor receiving.
2. Use the MOV instruction to w rite to this register.
3. After setting the CLK0 to CLK1 bits of the UiC0 register, w rite to the UiBRG register.
UARTi Transmit/Receive Mode Register (i = 0 or 1)
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
Address
U0MR
00A0h
U1MR
00A8h
Bit Symbol
Bit Name
Serial I/O mode select bits
SMD0
SMD1
SMD2
After Reset
00h
00h
Function
RW
b2 b1 b0
0 0 0 : Serial interface disabled
RW
0 0 1 : Clock synchronous serial I/O mode
1 0 0 : UART mode transfer data 7 bits long
1 0 1 : UART mode transfer data 8 bits long
RW
1 1 0 : UART mode transfer data 9 bits long
Other than above : Do not set
RW
Internal/external clock select bit 0 : Internal clock
CKDIR
1 : External clock⁽¹⁾
RW
Stop bit length select bit
0 : 1 stop bit
STPS
1 : 2 stop bits
RW
Odd/even parity select bit
Enable w hen PRYE = 1
PRY
0 : Odd parity
RW
1 : Even parity
Parity enable bit
0 : Parity disabled
PRYE
1 : Parity enabled
RW
—
Reserved bit
Set to 0.
(b7)
RW
NOTE:
1. When the CLK0 pin is used, set the PD1_6 bit in the PD1 register to 0 (input). When the CLK1 pin is used, set the
PD0_5 bit in the PD0 register to 0 (input).
Figure 15.4 Registers U0BRG to U1BRG and U0MR to U1MR
Rev.2.10 Sep 26, 2008 Page 244 of 453
REJ09B0278-0210