R8C-26_1 Datasheet, PDF (178/485 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/26 Group, R8C/27 Group
14. Timers
Timer RB I/O Control Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
Address
After Reset
TRBIOC
010Ah
00h
Bit Symbol
Bit Name
Function
RW
Timer RB output level select Function varies depending on operating mode.
TOPL _bit
RW
Timer RB output sw itch bit
TOCNT
RW
One-shot trigger control bit
INOSTG
RW
One-shot trigger polarity
INOSEG _{select bit}
RW
—
Nothing is assigned. If necessary, set to 0.
(b7-b4) When read, the content is 0.
—
Timer RB Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
TRBMR
Bit Symbol
TMOD0
Address
010Bh
Bit Name
Timer RB operating mode
select bits⁽¹⁾
TMOD1
After Reset
00h
Function
RW
b1 b0
0 0 : Timer mode
RW
0 1 : Programmable w aveform generation mode
1 0 : Programmable one-shot generation mode
1 1 : Programmable w ait one-shot generation mode _RW
—
Nothing is assigned. If necessary, set to 0.
(b2) When read, the content is 0.
—
Timer RB w rite control bit⁽²⁾ 0 : Write to reload register and counter
TWRC
1 : Write to reload register only
RW
Timer RB count source
b5 b4
TCK0 ^{select bits(1)}
0 0 : f1
RW
0 1 : f8
1 0 : Timer RA underflow
TCK1
1 1 : f2
RW
—
Nothing is assigned. If necessary, set to 0.
(b6) When read, the content is 0.
—
Timer RB count source
0 : Provides count source
TCKCUT _{cutoff bit(1)}
1 : Cuts off count source
RW
NOTES:
1. Change bits TMOD1 and TMOD0; TCK1 and TCK0; and TCKCUT w hen both the TSTART and TCSTF bits in the TRBCR
register set to 0 (count stops).
2. The TWRC bit can be set to either 0 or 1 in timer mode. In programmable w aveform generation mode, programmable
one-shot generation mode, or programmable w ait one-shot generation mode, the TWRC bit must be set to 1 (w rite to
reload register only).
Figure 14.14 Registers TRBIOC and TRBMR
Rev.2.10 Sep 26, 2008 Page 161 of 453
REJ09B0278-0210