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M30201_M Datasheet, PDF (218/415 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY | |||
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Timer A
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2.2.16 Precautions for Timer A (pulse width modulation mode)
(1) To clear reset, the count start flag is set to â0â. Set a value in the timer A0 register, then set the
flag to â1â.
(2) The timer A0 interrupt request bit becomes â1â if setting operation mode of the timer in com-
pliance with any of the following procedures:
⢠Selecting PWM mode after reset.
⢠Changing operation mode from timer mode to PWM mode.
⢠Changing operation mode from event counter mode to PWM mode.
Therefore, to use timer A0 interrupt (interrupt request bit), set timer A0 interrupt request bit to
â0â after the above listed changes have been made.
(3) Setting the count start flag to â0â while PWM pulses are being output causes the counter to
stop counting. If the TA0OUT pin is outputting an âHâ level in this instance, the output level
goes to âLâ, and the timer A0 interrupt request bit goes to â1â. If the TA0OUT pin is outputting
an âLâ level in this instance, the level does not change, and the timer A0 interrupt request bit
does not becomes â1â.
(4) Normal PWM output is restored according to the interrupt request generate timing, both in
the case of 16-bit PWM and 8-bit PWM, when PWM output is either âHâ or âLâ level for the
entire period. This holds only when a value other than â000016â or âFFFF16â is set during 16-
bit PWM, or a value other than â0016â or âFF16â is set during 8-bit PWM.
When PWM output is âHâ level for the entire period
PWM pulse output "H"
from TA0OUT pin "L"
Writing to the
timer A0
Normal PWM restored here
1 / fi X (n)
Timer A0 interrupt "1"
request bit
"0"
Cleared to â0â when interrupt request is accepted, or cleared by software
When PWM output is âLâ level for the entire period
PWM pulse output "H"
from TA0OUT pin "L"
Timer A0 interrupt "1"
request bit
"0"
Writing to the
timer A0
1 / fi X (n)
Cleared to â0â when interrupt request is accepted, or cleared by software
Figure 2.2.32. Operation timing of PWM output mode
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