3819_03 Datasheet, PDF (214/218 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

3. APPENDIX
3.7 Memory map
000016
000116
000216
000316
000416
000516
000616
000716
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
001016
001116
001216
001316
001416
001516
001616
001716
001816
001916
001A16
001B16
001C16
001D16
001E16
001F16
Port P0 (P0)
Port P1 (P1)
Port P2 (P2)
Port P2 direction register (P2D)
Port P3 (P3)
Port P4 (P4)
Port P4 direction register (P4D)
Port P5 (P5)
Port P5 direction register (P5D)
Port P6 (P6)
Port P6 direction register (P6D)
Port P7 (P7)
Port P7 direction register (P7D)
Port P8 (P8)
Port P8 direction register (P8D)
Port P9 (P9)
Port PA (PA)
Port PA direction register (PAD)
Port PB (PB)
Port PB direction register (PBD)
Serial I/O automatic transfer data pointer (SIODP)
Serial I/O1 control register (SIO1CON)
Serial I/O automatic transfer control register (SIOAC)
Serial I/O1 register (SIO1)
Serial I/O automatic transfer interval register (SIOAI)
Serial I/O2 control register (SIO2CON)
Serial I/O3 control register (SIO3CON)
Serial I/O2 register (SIO2)
MITSUBISHI MICROCOMPUTER
3819 Group
3.7 Memory map
002016
002116
002216
002316
002416
002516
002616
002716
002816
002916
002A16
002B16
002C16
002D16
002E16
002F16
003016
003116
003216
003316
003416
003516
003616
003716
003816
003916
003A16
003B16
003C16
003D16
003E16
003F16
Timer 1 (T1)
Timer 2 (T2)
Timer 3 (T3)
Timer 4 (T4)
Timer 5 (T5)
Timer 6 (T6)
Serial I/O3 register (SIO3)
Timer 6 PWM register (T6PWM)
Timer 12 mode register (T12M)
Timer 34 mode register (T34M)
Timer 56 mode register (T56M)
D-A conversion register (DA)
AD-DA control register (ADCON)
A-D conversion register (AD)
Interrupt interval determination register (IID)
Interrupt interval determination control register (IIDCON)
Port P0 segment/digit switch register (P0SDR)
Port P2 digit/port switch register (P2DPR)
Port P8 segment/port switch register (P8SPR)
Port PA segment/port switch register (PASPR)
FLDC mode register 1 (FLDM1)
FLDC mode register 2 (FLDM2)
FLD data pointer (FLDDP)
Zero cross detection control register (ZCRCON)
Interrupt edge selection register (INTEDGE)
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
200
3819 Group USER’S MANUAL