3819_03 Datasheet, PDF (205/218 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

3. APPENDIX
MITSUBISHI MICROCOMPUTER
3819 Group
3.3 Control registers
FLD data pointer
b7 b6 b5 b4 b3 b2 b1 b0
FLD data pointer (FLDDP) [Address:38 16]
B
Function
0 Indicate the address of data which is transfered to the segment of
the FLD automatic display RAM.
1
At reset R W
?
!
?
!
2
?
!
3
?
!
4
?
!
5
?
!
6
?
!
7 Nothing is allocated for this bit. This is a write disabled bit.
When this bit is read out, the value is "0."
0
!
Fig. 3.3.21 Structure of FLD data pointer
FLD data pointer reload register
b7 b6 b5 b4 b3 b2 b1 b0
FLD data pointer reload register (FLDDP) [Address:3816]
B
Function
0 Indicate the first digit address of the high-order segment.
1
2
3
4
5
6
7 ^{Nothing is allocated for this bit. This is a write disabled bit.}
At reset R W
?!
?!
?!
?!
?!
?!
?!
? !!
Fig. 3.3.22 Structure of FLD data pointer reload register
3819 Group USER’S MANUAL
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