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UPA2736GR_16 Datasheet, PDF (2/7 Pages) Renesas Technology Corp – P-channel MOSFET
μPA2736GR
Electrical Characteristics (TA = 25°C)
Item
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance ∗1
Drain to Source On-state
Resistance ∗1
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage ∗1
Reverse Recovery Time
Reverse Recovery Charge
Note: ∗1. Pulsed
Symbol
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
QGS
QGD
VF(S-D)
trr
Qrr
MIN.
−1.0
6
TYP.
5.8
9.2
3400
1600
1450
30
45
100
100
80
5
40
0.84
55
70
MAX.
−1
m100
−2.5
7.0
13.5
Unit
μA
nA
V
S
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
Test Conditions
VDS = −30 V, VGS = 0 V
VGS = m20 V, VDS = 0 V
VDS = −10 V, ID = −1 mA
VDS = −10 V, ID = −7 A
VGS = −10 V, ID = −14 A
VGS = −4.5 V, ID = −14 A
VDS = −10 V,
VGS = 0 V,
f = 1 MHz
VDD = −15 V, ID = −7 A,
VGS = −10 V,
RG = 10 Ω
VDD = −24 V,
VGS = −10 V,
ID = −14 A
IF = 14 A, VGS = 0 V
IF = 14 A, VGS = 0 V,
di/dt = 100 A/μs
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = −20 → 0 V
−
IAS BVDSS
VDS
ID
VDD
Starting Tch
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG
PG.
VGS(−)
0
τ
τ = 1 μs
Duty Cycle ≤ 1%
RL
VDD
VGS(−)
VGS
Wave Form
10%
0
VDS(−)
90%
VDS
VDS
Wave Form 0
td(on)
VGS
90%
90%
10% 10%
tr td(off)
tf
ton
toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = −2 mA
RL
PG.
50 Ω
VDD
R07DS1320EJ0100 Rev.1.00
Jan 25, 2016
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