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| NP55N04SLG Datasheet, PDF (2/8 Pages) Renesas Technology Corp – MOS FIELD EFFECT TRANSISTOR | |||
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NP55N04SLG
Electrical Characteristics (TA = 25°C)
Item
Symbol Min
Zero Gate Voltage Drain Current IDSS
Gate Leakage Current
IGSS
Gate to Source Threshold
VGS(th)
1.5
Voltage
Forward Transfer Admittance â1 | yfs |
12
Drain to Source On-state
Resistance â1
RDS(on)1
RDS(on)2
RDS(on)3
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance Crss
Turn-on Delay Time
td(on)
Rise Time
tr
Turn-off Delay Time
td(off)
Fall Time
tf
Total Gate Charge
QG
Gate to Source Charge
QGS
Gate to Drain Charge
Body Diode Forward Voltage â1
QGD
VF(S-D)
Reverse Recovery Time
trr
Reverse Recovery Charge
Qrr
Note: â1. Pulsed test
Typ
2.0
32
4.7
5.7
6.3
2700
310
200
15
17
60
8
57
9
17
0.9
30
28
Max
1
±10
2.5
6.5
8.5
15
4050
465
380
33
43
120
20
86
1.5
Chapter Title
Unit
μA
μA
V
Test Conditions
VDS = 40 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
VDS = VGS, ID = 250 μA
S
VDS = 10 V, ID = 28 A
mΩ VGS = 10 V, ID = 28 A
mΩ VGS = 5.0 V, ID = 28 A
mΩ VGS = 4.5 V, ID = 11 A
pF
VDS = 25 V,
pF
VGS = 0 V,
pF f = 1 MHz
ns
VDD = 20 V, ID = 28 A,
ns
VGS = 10 V,
ns
RG = 0 Ω
ns
nC
VDD = 32 V,
nC
VGS = 10 V,
nC
ID = 55 A
V
IF = 55 A, VGS = 0 V
ns
IF = 55 A, VGS = 0 V,
nC di/dt = 100 A/μs
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = 20 â 0 V
BVDSS
IAS
ID
VDD
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
RG
PG.
VGS
0
Ï
Ï = 1 μs
Duty Cycle ⤠1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
0
Wave Form
td(on)
VGS
90%
90%
10% 10%
tr td(off) tf
ton
toff
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
R07DS0242EJ0100 Rev.1.00
Feb 23, 2011
Page 2 of 6
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