HD74LS273 Datasheet, PDF (2/7 Pages) Hitachi Semiconductor – Octal D-type Positive-edge-triggered Flip-Flops(with Clear)

HD74LS273
Function Table
Inputs
Clear
Clock
D
L
X
X
H
↑
H
H
↑
L
H
L
X
Notes: H; high level, L; low level, X; irrelevant
↑; transition from low to high level
Q₀; level of Q before the indicated steady-state input conditions were established.
Block Diagram
1D
2D
3D
4D
5D
6D
7D
Output
Q
L
H
L
Q₀
8D
Clock (1)
Clear (2)
DQ
CK
Clear
DQ
CK
Clear
DQ
CK
Clear
DQ
CK
Clear
DQ
CK
Clear
DQ
CK
Clear
DQ
CK
Clear
DQ
CK
Clear
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
Absolute Maximum Ratings
Item
Symbol
Ratings
Supply voltage
V_CC
7
Input voltage
V_IN
7
Power dissipation
P_T
400
Storage temperature
Tstg
–65 to +150
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item
Supply voltage
Output current
Operating temperature
Clock frequency
Clock pulse width
Clear pulse width
Data setup time
Clear (inactive-state) setup time
Data hold time
Symbol
V_CC
I_OH
I_OL
Topr
ƒ_clock
t_{w (clock)}
t_{w (clear)}
t_{su (data)}
t_{su (clear)}
t_{h (data)}
Min
4.75
—
—
–20
0
20
20
20↑
25↑
5↑
Typ
5.00
—
—
25
—
—
—
—
—
—
Max
5.25
–400
8
75
30
—
—
—
—
—
Unit
V
V
mW
°C
Unit
V
µA
mA
°C
MHz
ns
ns
ns
ns
ns
Rev.3.00, Jul.15.2005, page 2 of 6