HD74LS273 Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – Octal D-type Positive-edge-triggered Flip-Flops(with Clear)

HD74LS273
Octal D-type Positive-edge-triggered Flip-Flops (with Clear)
REJ03D0473–0300
Rev.3.00
Jul.15.2005
The HD74LS273, positive-edge-triggered flip-flops utilize LS TTL circuitry to implement D-type flip-flop logic with a
direct clear input.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going
edge of the clock pulse.
When the clock input is at either the high or low level, the D input signal has no effect at the output.
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS273P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
HD74LS273FPEL SOP-20 pin (JEITA)
PRSP0020DD-B
FP
(FP-20DAV)
HD74LS273RPEL SOP-20 pin (JEDEC)
PRSP0020DC-A
(FP-20DBV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
Pin Arrangement
Clear 1
1Q 2
1D 3
2D 4
2Q 5
3Q 6
3D 7
4D 8
4Q 9
GND 10
Q
Clear
D CK
D CK
Clear
Q
Q
Clear
D CK
D CK
Clear
Q
Q
Clear
CK D
CK D
Clear
Q
Q
Clear
CK D
CK D
Clear
Q
20 V_CC
19 _8Q
18 _8D
17 _7D
16 _7Q
15 _6Q
14 _6D
13 _5D
12 _5Q
11 Clock
(Top view)
Rev.3.00, Jul.15.2005, page 1 of 6