HD74HCT237 Datasheet, PDF (2/8 Pages) Hitachi Semiconductor – 3-to-8-line Decoder/Demultiplexer with Address Latch

HD74HCT237
Pin Arrangement
A1
B2
C3
GL 4
G2 5
G1 6
Y7 7
GND 8
A
B
Y0
C
Y1
GL
Y2
G2
Y3
G1
Y4
Y7 _Y6 Y₅
(Top view)
16 VCC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
Logic Diagram
A
Y0
Y1
B
Y2
Y3
Y₄
C
Y5
Y6
GL
Y7
G2
G₁
Rev.2.00 Mar 30, 2006 page 2 of 7