HD74HC113 Datasheet, PDF (2/7 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops (with Preset)

HD74HC113
Pin Arrangement
1CK 1
14 V_CC
1K 2
13 2CK
1J 3
1PR 4
1Q 5
1Q 6
J _CK K
PR
QQ
K _CK J
PR
QQ
12 2K
11 2J
10 2PR
9 2Q
GND 7
8 2Q
(Top view)
Logic Diagram (1/2)
CLR
Q
J
CK
CK
Q
K
#
CK
CK
# _CK
CK
#
CK
CK
CK
#
CK
#
CK
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage range
VCC
–0.5 to 7.0
V
Input / Output voltage
Vin, Vout
–0.5 to VCC +0.5
V
Input / Output diode current
IIK, IOK
±20
mA
Output current
IO
±25
mA
VCC, GND current
ICC or IGND
±50
mA
Power dissipation
PT
500
mW
Storage temperature
Tstg
–65 to +150
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.2.00, Oct 11, 2005 page 2 of 6