HD74HC113 Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops (with Preset)

HD74HC113
Dual J-K Flip-Flops (with Preset)
REJ03D0563-0200
(Previous ADE-205-436)
Rev.2.00
Oct 11, 2005
Description
This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.
Each one has independent J, K, clock, and preset inputs and Q and Q inputs. Preset is independent of the clock and
accomplished by a low level on the input.
Features
• High Speed Operation: t_pd (Clock to Q) = 18 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 2 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC113P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74HC113FPEL SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
FP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Function Table
Inputs
Output
Preset
Clock
J
K
Q
Q
L
X
X
X
H
L
H
L
L
No change
H
L
H
L
H
H
H
L
H
L
H
H
H
Toggle
H
H
X
X
No change
H
L
X
X
No change
H
X
X
No change
H : High level
L : Low level
X : Irrelevant
Rev.2.00, Oct 11, 2005 page 1 of 6