HD74HC112 Datasheet, PDF (2/7 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops (with Preset and Clear)

HD74HC112
Pin Arrangement
1CK 1
1K 2
1J 3
1PR 4
1Q 5
1Q 6
2Q 7
GND 8
J _CK K
PR CLR
QQ
K _CK J
CLR PR
QQ
(Top view)
16 Vcc
15 1CLR
14 2CLR
13 2CK
12 2K
11 2J
10 2PR
9 2Q
Logic Diagram (1/2)
PR
CLR
Q
CK
J
CK
Q
K
CK
CK
CK
CK
CK
CK
CK
CK
CK
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
VCC, GND current
Power dissipation
Storage temperature
VCC
Vin, Vout
IIK, IOK
IO
ICC or IGND
PT
Tstg
–0.5 to 7.0
V
–0.5 to VCC +0.5
V
±20
mA
±25
mA
±50
mA
500
mW
–65 to +150
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.2.00, Oct 11, 2005 page 2 of 6