PD62A_15 Datasheet, PDF (19/64 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION

µPD62A
3.3 Control Register 0 (P3)
Control register 0 consists of 8 bits. The contents that can be controlled are as shown below.
When reset, this register becomes 0000 0011B.
Table 3-4. Control Register 0 (P3)
Bit
Name
b7
—
Set
0
value
1
After reset
Fixed
to 0
0
b6
—
Fixed
to 0
0
b5
b4
b3
DP (Data pointer) TCTL
DP9
DP8
0
0
1/1
1
1
1/2
0
0
0
b2
CARY
b1
MOD1
b0
MOD0
ON
OFF
0
Refer to Table 3-5.
1
1
b0 and b1: These bits specify the carrier frequency and duty ratio of the REM output.
b2:
This bit specifies the availability of the carrier of the frequency specified by b0 and b1.
“0” = ON (with carrier); “1” = OFF (without carrier; high level)
b3:
This bit changes the carrier frequency and the timer clock’s frequency division ratio.
“0” = 1/1 (carrier frequency: the specified value of b0 and b1; timer clock: fX/64)
“1” = 1/2 (carrier frequency: half of the specified value of b0 and b1; timer clock: fX/128)
Table 3-5. Timer Clock and Carrier Frequency Settings
b3
0
0
b2
0
1
0
1
b1
0
0
1
1
×
0
0
1
1
×
b0
0
1
0
1
×
0
1
0
1
×
Timer Clock
fX/64
fX/128
Carrier Frequency (Duty Ratio)
fX/8 (Duty 1/2)
fX/64 (Duty 1/2)
fX/96 (Duty 1/2)
fX/96 (Duty 1/3)
Without carrier (high level)
fX/16 (Duty 1/2)
fX/128 (Duty 1/2)
fX/192 (Duty 1/2)
fX/192 (Duty 1/3)
Without carrier (high level)
b4 and b5: These bits specify the high-order 2 bits (DP8 and DP9) of the ROM data pointer.
Remark ×: don’t care
Data Sheet U14474EJ2V0DS00
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