7905 Datasheet, PDF (186/565 Pages) List of Unclassifed Manufacturers – LINEAR INTEGRATED CIRCUITS 3-TERMINAL VOLATGE REGULATORS

PULSE OUTPUT PORT MODE
9.2 Block description of pulse output port 0
9.2.1 Waveform output mode register
Figure 9.2.2 shows the structure of the waveform output mode register (pulse output port 0).
Waveform output mode register (Address A616)
b7 b6 b5 b4 b3 b2 b1 b0
Bit
Bit name
0 Waveform output select bits
(Note)
1
2
3 Pulse output mode select bit
See Table 9.2.1.
Function
0 : Pulse mode 0
1 : Pulse mode 1
At reset R/W
0
RW
0
RW
0
RW
0
RW
4 Pulse width modulation timer
5 ^{select bits}
See Table 9.2.2.
0
RW
0
RW
6 Waveform output control bit 0 ^{When pulse mode 0 is selected,}
0: RTP10 to RTP13: pulse outputs are disabled.
1: RTP10 to RTP13: pulse outputs are enabled.
When pulse mode 1 is selected,
0: RTP12, RTP13: pulse outputs are disabled.
1: RTP12, RTP13: pulse outputs are enabled.
0
RW
7 Waveform output control bit 1 When pulse mode 0 is selected,
0 : RTP00 to RTP03: pulse outputs are disabled.
0
RW
1 : RTP00 to RTP03: pulse outputs are enabled.
When pulse mode 1 is selected,
0 : RTP00 to RTP03, RTP10, RTP11: pulse outputs
are disabled.
1 : RTP00 to RTP03 RTP10, RTP11: pulse outputs
are enabled.
Note: When not using pulse output port 0 and three-phase waveform mode, be sure to fix these bits to “0002.”
Fig. 9.2.2 Structure of waveform output mode register (pulse output port 0)
7905 Group User’s Manual Rev.1.0
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