7470_N Datasheet, PDF (181/354 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES

HARDWARE
1.17 Low-power dissipation function
2 Recovery by interrupt
When an interrupt request is generated in the stop mode, this stop mode is released and oscillation
is started. The interrupt sources that are available for recovery are shown below.
q INT0, INT1
q CNTR0, CNTR1
q Serial I/O at using external clock
q Timer (timer 1, timer 2) at using external clock
q Key input (key on wake up)
However, when the above interrupt sources are used for recovery from the stop mode, perform the
following setting and then execute the STP instruction to permit an interrupt to be used.
[Register setting]
1 Clear the interrupt enable bit of timer 3 and timer 4 to “0.” (Disabled)
2 Set the count stop bit of timer 3 and timer 4 to “1.” (Stop)
3 Select a count source of timer 3 in consideration of the oscillation stabilizing time of the
oscillator.
Note: Re-set the previous count source at recovery.
4 Clear the interrupt request bit of the interrupt source to be used for recovery to “0.”
5 Set the interrupt enable bit of the interrupt source to be used for recovery to “1.”(Enabled)
6 Clear the count stop bit of timer 3 and timer 4 to “0.” (Count starts)
7 When using the sub-clock, set the XCOUT drive capacity to high power. (Refer to “1.16.2 Sub-
clock oscillation circuit.”)
8 Clear the interrupt disable flag I to “0.” (Enabled)
Note: In the stop mode, A-D conversion operation stops. Accordingly, execute the STP instruction
after termination of the A-D conversion.
For the details of the Interrupt, refer to “1.11 Interrupts.”
At a start of oscillation of the oscillator, the oscillation is unstable. It takes time before stabilization
of oscillation (oscillation stabilizing time). At recovery by interrupt, the waiting time for the supply
of internal clock φ to the CPU by timer 3 and timer 4⁺¹ is automatically generated⁺². The oscillation
stabilizing time of the system clock side is secured by this waiting time.
Figure 1.17.4 shows an example of restoration sequence from the stop mode by the INT0 interrupt.
+1: When the STP instruction is executed, “FF16” and “0716” are automatically set in the counter
and latch of timer 3 and the counter and latch of timer 4, respectively.
+2: The count source is supplied to timer 3 immediately after a start of oscillation, thereby starting
a count operation. The supply of internal clock φ to the CPU is started when timer 4 overflows.
1-164
7470/7471/7477/7478 GROUP USER’S MANUAL