7470_N Datasheet, PDF (137/354 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES

HARDWARE
1.13 Serial I/O
q Transmit interrupt operation (valid when the Serial I/O is selected)
Regarding a transmit interrupt, interrupt request generating timing can be selected by bit 3 of the
Serial I/O control register (SIOCON).
0: When the Transmit buffer register becomes empty after the data written in the Transmit buffer
register is transferred to the Transmit shift register, an interrupt request is generated.
1: When the shift operation of the Transmit shift register is completed, an interrupt request is
generated.
* In case of the UART, an interrupt operation is performed in the same way as when the synchronous
clock is selected.
Figure 1.13B.9 shows a transmit operation of UART and Figure 1.13B.10 shows a transmit timing
of UART.
1 _{Data bus}
Address 00E016
Write transmit data
Transmit buffer register
b0
1
Serial I/O status register
(Address 00E116)
0
2
Transmit buffer register
Transfer transmit data
Transmit shift register
Serial I/O status register
(Address 00E116)
When “0” is selected by the bit 3
of the Serial I/O control register
Interrupt request register 1 ⁰
(Address 00FC16)
1
b6
3 ^{Synchronous clock}
b0
D7 D6 D5D4 D3D2 D1D0
Transmit shift register
0
1
b0
ST
P15/TxD
4
Serial I/O status register
(Address 00E116)
5 Synchronous clock
b0
D7D6 D5 D4D3 D2 D1
Transmit shift register
1
0
b2
D0
P15/TxD
6 _{Synchronous clock}
SP
P15/TxD
0
Serial I/O status register
(Address 00E116)
1
b2
When “1” is selected by the bit 3
of the Serial I/O control register
Interrupt request ⁰
register 1
(Address 00FC16)
1
b6
Fig. 1.13B.9 Transmit operation of UART
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7470/7471/7477/7478 GROUP USER’S MANUAL