R1EX24016ASAS0I_12 Datasheet, PDF (18/19 Pages) Renesas Technology Corp – Two-wire serial interface 16k EEPROM

Revision History
R1EX24016ASAS0I/R1EX24016ATAS0I Data Sheet
Rev.
0.01
0.02
Date
Dec. 28, 2007
Jan. 08, 2009
1.00
Feb. 23, 2012
Page
—
P1
P4
P5
—
P7
P9
P14
P15
Description
Summary
Initial issue
Features
Endurance cycles change 10⁶ cycles to 1,000k cycles @25°C.
Data retentions years change 10 years to 100years@25°C.
Memory cell characteristics new is described.
AC characteristics
Erase/Write endurance is deleted.
Notes1. change Not 100% tested.
Notes3. deleted.
Delete Preliminary
Addition of write protect description
The WP pin is internally pulled-down to Vss. Write operations for all memory
array are allowed if unconnected.
Delete the sentence
or device address code doesn’t coincide with status of the correspond hard-
wired device address pins A0 to A2.
Change the sentence
device address word (R/W=0) and memory address 2  8-bit sequentially. to
device address word (R/W=0) and memory address 8-bit sequentially.
Change Note
VCC turn on speed should be longer than 10 s. to
V_CC turn on rate should be slower than 2 s/V.
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