HD49340NP_15 Datasheet, PDF (18/24 Pages) Renesas Technology Corp – CDS/PGA & 10-bit A/D Converter

HD49340NP/HNP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
Ratings
Unit
Power supply voltage
Analog input voltage
Digital input voltage
Operating temperature
VDD(max)
4.1
V
VIN(max)
–0.3 to AVDD +0.3
V
VI(max)
–0.3 to DVDD +0.3
V
Topr
–20 to +85
°C
Power dissipation
Pt(max)
400
mW
Storage temperature
Tstg
–55 to +125
°C
Power supply voltage range (HD49340HNP) Vopr
2.85 to 3.45
V
Power supply voltage range (HD49340NP)
2.70 to 3.45
Notes: 1. VDD indicates AVDD and DVDD.
2. AVDD and DVDD must be commonly connected outside the IC. When they are separated by a noise filter, the
potential difference must be 0.3 V or less at power on, and 0.1 V or less during operation.
Electrical Characteristics
(Unless othewide specified, Ta = 25°C, AV_DD = 3.0 V, DV_DD = 3.0 V, and R_BIAS = 33 kΩ)
• Items Common to CDSIN and ADCIN Input Modes
Item
Symbol Min
Typ
Max
Unit
Test Conditions Remarks
Power supply voltage
range
Conversion frequency
Digital input voltage
VDD hi
VDD low
fCLK hi
fCLK low
VIH
VIL
2.85
2.70
20
5.5
2.0
×
DV_DD
3.0
0
3.00
3.00
—
—
—
—
3.45
3.45
36
25
DVDD
0.8
×
DV_DD
3.0
V
V
MHz
MHz
V
V
LoPwr = low
LoPwr = high
LoPwr = low
LoPwr = high
HD49340HNP
HD49340NP
HD49340HNP
HD49340NP
Digital input pins
other than CS,
SCK and SDATA
VIH2
2.25
×
DV_DD
3.0
—
DVDD
V
CS, SCK, SDATA
VIL2
0
—
0.6
×
DV_DD
3.0
V
Digital output voltage
VOH
DVDD –0.5
—
—
VOL
—
—
0.5
Digital input current
IIH
—
—
50
IIL
–50
—
—
Digital output current
IOZH
—
—
50
IOZL
–50
—
—
ADC resolution
RES
10
10
10
V
IOH = –1 mA
V
IOL = +1 mA
µA
VIH = 3.3 V
µA
VIL = 0 V
µA
VOH = VDD
µA
VOL = 0 V
bit
ADC integral linearity
ADC differential linearity+
ADC differential linearity–
Sleep current
INL
DNL+
DNL–
ISLP
—
—
–0.9
–100
(3)
—
0.3
0.9
–0.3
—
0
100
LSBp-p fCLK = 25 MHz
LSB
fCLK = 25 MHz
*1
LSB
fCLK = 25 MHz
*1
µA
Digital input pin is
set to 0 V, output
pin is open
Standby current
ISTBY
—
3
5
mA
Digital I/O pin is set
to 0 V
Notes: 1. Differential linearity is the calculated difference in linearity errors between adjacent codes.
2. Values within parentheses ( ) are for reference.
Rev.1.0 Apr 20, 2004 page 16 of 21