R8C-18_1 Datasheet, PDF (173/257 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/1x SERIES

R8C/18 Group, R8C/19 Group
15. Serial Interface
Table 15.5 Registers Used and Settings for UART Mode
Register
UiTB
UiRB
UiBRG
UiMR
UiC0
UiC1
UCON
Bit
0 to 8
0 to 8
OER,FER,PER,SUM
0 to 7
SMD2 to SMD0
CKDIR
STPS
PRY, PRYE
CLK0, CLK1
TXEPT
NCH
CKPOL
UFORM
TE
TI
RE
RI
U0IRS, U1IRS
U0RRM
CNTRSEL
Function
Set transmit data⁽¹⁾.
Receive data can be read⁽¹⁾.
Error flag
Set a bit rate.
Set to 100b when transfer data is 7 bits long.
Set to 101b when transfer data is 8 bits long.
Set to 110b when transfer data is 9 bits long.
Select the internal clock or external clock.⁽²⁾
Select the stop bit.
Select whether parity is included and whether odd or even.
Select the count source for the UiBRG register.
Transmit register empty flag
Select TXDi pin output mode.
Set to 0.
LSB first or MSB first can be selected when transfer data is 8 bits
long. Set to 0 when transfer data is 7 or 9 bits long.
Set to 1 to enable transmit.
Transmit buffer empty flag
Set to 1 to enable receive.
Receive complete flag
Select the source of UART0 transmit interrupt.
Set to 0.
Set to 1 to select P1_5/RXD0/CNTR01/INT11.
NOTES:
1. The bits used for transmit/receive data are as follows: Bits 0 to 6 when transfer data is 7 bits long;
bits 0 to 7 when transfer data is 8 bits long; bits 0 to 8 when transfer data is 9 bits long.
2. An external clock can be selected in UART0 only.
Table 15.6 lists the I/O Pin Functions in Clock Asynchronous Serial I/O Mode. The TXDi pin outputs “H”
level between the operating mode selection of UARTi (i = 0 or 1) and transfer start. (If the NCH bit is set
to 1 (N-channel open-drain output), this pin is in a high-impedance state.)
Table 15.6 I/O Pin Functions in Clock Asynchronous Serial I/O Mode
Pin Name
TXD0 (P1_4)
RXD0 (P1_5)
CLK0 (P1_6)
TXD1 (P3_7)
RXD1 (P4_5)
Function
Output serial data
Input serial data
Programmable I/O port
Input transfer clock
Output serial data
Input serial data
Selection Method
(Cannot be used as a port when performing reception only.)
PD1_5 bit in PD1 register = 0
(P1_5 can be used as an input port when performing
transmission only.)
CKDIR bit in U0MR register = 0
CKDIR bit in U0MR register = 1
PD1_6 bit in PD1 register = 0
Bits U1SEL1 to U1SEL0 in UCON register = 11b (P3_7 can be
used as a port when bits U1SEL1 to U1SEL0 = 01b and
performing reception only.)
PD4_5 bit in PD4 register = 0
Bits U1SEL1 to U1SEL0 in UCON register = 01b or 11b
(Cannot be used as a port when performing transmission only.)
Rev.1.30 Apr 14, 2006 Page 158 of 233
REJ09B0222-0130