H8S2628_10 Datasheet, PDF (162/658 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 8 Data Transfer Controller (DTC)
8.5.2 Repeat Mode
In repeat mode, one operation transfers one byte or one word of data. Table 8.3 lists the register
information in repeat mode.
From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the
initial state of the transfer counter and the address register specified as the repeat area is restored,
and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and
therefore CPU interrupts cannot be requested when DISEL = 0.
Table 8.3 Register Information in Repeat Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Function
Designates source address
Designates destination address
Holds number of transfers
Designates transfer count
Not used
SAR
or
DAR
Repeat area
Transfer
DAR
or
SAR
Figure 8.6 Memory Mapping in Repeat Mode
Rev. 4.00 Mar. 16, 2010 Page 114 of 606
REJ09B0155-0400