HN58X2408FPIAG Datasheet, PDF (16/21 Pages) Renesas Technology Corp – Two-wire serial interface 8k EEPROM (1-kword × 8-bit)/16k EEPROM (2-kword × 8-bit) 32k EEPROM (4-kword × 8-bit)/64k EEPROM (8-kword × 8-bit)

HN58X2408/HN58X2416/HN58X2432/HN58X2464FPIAG
Random Read:
This is a read operation with defined read address. A random read requires a dummy write to set read
address. The EEPROM receives a start condition, device address word(R/W=0) and memory address (8-
bit for 8kbit to 16kbit EEPROMs, 2 × 8-bit for 32kbit and 64kbit EEPROMs) sequentially. The EEPROM
outputs acknowledgment “0” after receiving memory address then enters a current address read with
receiving a start condition. The EEPROM outputs the read data of the address which was defined in the
dummy write operation. After receiving acknowledgment “1”(no acknowledgment) and a following stop
condition, the EEPROM stops the random read operation and returns to a standby state.
Random Read Operation
8k to
16k
Start
32k to
64k
Start
Device
address
@@@
1010
W
Memory
address (n)
ACK
R/W
Dummy write
Device
address
@@@
1010
W
1st Memory
address (n)
ACK
R/W
Dummy write
Device
address
###
1010
R
Read data (n)
Start
ACK
ACK No ACK
R/W
Stop
Currect address read
2nd Memory
address (n)
ACK
Device
address
###
1010
R
Start ^R/W
ACK
ACK
Read data (n)
No ACK
Stop
Currect address read
Notes: 1. Don‘t care bits for 32k and 64k.
2. Don‘t care bit for 32k.
3. 2nd device address code (#) should be same as 1st (@).
Rev.3.00, Dec.21.2004, page 16 of 19