R8C-28_1 Datasheet, PDF (158/471 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/28 Group, R8C/29 Group
14. Timers
14.1.2 Pulse Output Mode
In pulse output mode, the internally generated count source is counted, and a pulse with inverted polarity is
output from the TRAIO pin each time the timer underflows (refer to Table 14.3 Specifications of Pulse
Output Mode).
Figure 14.6 shows the TRAIOC Register in Pulse Output Mode.
Table 14.3 Specifications of Pulse Output Mode
Item
Specification
Count sources
f1, f2, f8, fOCO, fC32⁽²⁾
Count operations
• Decrement
• When the timer underflows, the contents in the reload register is reloaded
and the count is continued.
Divide ratio
1/(n+1)(m+1)
n: Value set in TRAPRE register, m: Value set in TRA register
Count start condition 1 (count starts) is written to the TSTART bit in the TRACR register.
Count stop conditions
• 0 (count stops) is written to the TSTART bit in the TRACR register.
• 1 (count forcibly stops) is written to the TSTOP bit in the TRACR register.
Interrupt request
generation timing
When timer RA underflows [timer RA interrupt].
INT1/TRAIO pin function Pulse output, programmable output port, or INT1 interrupt⁽¹⁾
TRAO pin function
Programmable I/O port or inverted output of TRAIO⁽¹⁾
Read from timer
The count value can be read by reading registers TRA and TRAPRE.
Write to timer
• When registers TRAPRE and TRA are written while the count is stopped,
values are written to both the reload register and counter.
• When registers TRAPRE and TRA are written during the count, values are
written to the reload register and counter (refer to 14.1.1.1 Timer Write
Control during Count Operation).
Select functions
• TRAIO signal polarity switch function
The TEDGSEL bit in the TRAIOC register selects the level at the start of
pulse output.⁽¹⁾
• TRAO output function
Pulses inverted from the TRAIO output polarity can be output from the TRAO
pin (selectable by the TOENA bit in the TRAIOC register).
• Pulse output stop function
Output from the TRAIO pin is stopped by the TOPCR bit in the TRAIOC
register.
• INT1/TRAIO pin select function
P1_7 or P1_5 is selected by the TIOSEL bit in the TRAIOC register.
NOTES:
1. The level of the output pulse becomes the level when the pulse output starts when the TRAMR
register is written to.
2. For J, K version, fC32 cannot be selected.
Rev.2.10 Sep 26, 2008 Page 141 of 441
REJ09B0279-0210