R8C-28_1 Datasheet, PDF (117/471 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/28 Group, R8C/29 Group
10. Clock Generation Circuit
Interrupt sources judgement
OCD3 = 1 ?
NO
(XIN clock stopped)
YES
OCD1 = 1
(oscillation stop detection
interrupt enabled) and OCD2 = 1
NO
(on-chip oscillator clock selected
as system clock) ?
YES
VW2C3 = 1 ?
(Watchdog timer
NO
underflow)
YES
Set OCD1 bit to 0 (oscillation stop
detection interrupt disabled).⁽¹⁾
To oscillation stop detection
interrupt routine
To watchdog timer
interrupt routine
To voltage monitor 2
interrupt routine
NOTE:
1. This disables multiple oscillation stop detection interrupts.
OCD1 to OCD3: Bits in OCD register
VW2C3: Bit in VW2C register
Figure 10.20 Example of Determining Interrupt Source for Oscillation Stop Detection, Watchdog
Timer, Voltage Monitor 1, or Voltage Monitor 2 Interrupt (J, K Version)
Rev.2.10 Sep 26, 2008 Page 100 of 441
REJ09B0279-0210