H838076R Datasheet, PDF (150/669 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Super Low Power Series

Section 4 Interrupt Controller
Initial
Bit
Bit Name Value R/W Description
0
IRRI0
0
R/(W)* IRQ0 Interrupt Request Flag
[Setting condition]
When the IRQ0 pin is set as the interrupt input pin and
the specified edge is detected
[Clearing condition]
When 0 is written to this bit
Note: * Only a write of 0 for flag clearing is possible.
4.3.6 Interrupt Request Register 2 (IRR2)
IRR2 indicates the interrupt request status of the direct transition, A/D converter, timer F, and
asynchronous event counter.
Initial
Bit
Bit Name Value R/W
Description
7
IRRDT
0
R/(W)* Direct Transition Interrupt Request Flag
[Setting condition]
When the SLEEP instruction is executed and direct
transition is made while the DTON bit in SYSCR2 is set
to 1
[Clearing condition]
When 0 is written to this bit
6
IRRAD
0
R/(W)* A/D Converter Interrupt Request Flag
[Setting condition]
When A/D conversion ends
[Clearing condition]
When 0 is written to this bit
5
—
0
R
Reserved
This bit is always read as 0.
4

1
R/W Reserved
This bit is always read as 1.
Rev. 4.00 Aug 23, 2006 Page 78 of 594
REJ09B0093-0400