HD74LV161A_15 Datasheet, PDF (15/18 Pages) Renesas Technology Corp – Synchronous 4-bit Binary Counter (Direct Clear)

HD74LV161A
Waveform − 5
Cascade mode
(Set to maximum count number)
ENT
50%V_CC
50%V_CC
V_CC
GND
CARRY
50%V_CC
V_OH
50%V_CC
t_pLH
t_pHL
V_OL
Note: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t _r≤ 3 ns, t _f ≤ 3 ns
Application
Cascade circuitry
H: COUNT
L: DISABLE
INPUTS
H: COUNT
L: DISABLE
CLR
CLK
LD A B C D
ENP
ENT
CK
CARRY
CLR QA QB QC QD
OUTPUT
INPUTS
LD A B C D
ENP
ENT
CK
CARRY
CLR QA QB QC QD
OUTPUT
INPUTS
LD A B C D
ENP
ENT
CK
CARRY
CLR QA QB QC QD
OUTPUT
to next stages
Rev.4.00 Jun. 04, 2004 page 13 of 15