RX210_15 Datasheet, PDF (14/223 Pages) Renesas Technology Corp – Renesas MCUs

RX210 Group
1.4 Pin Functions
Table 1.8 lists the pin functions.
Table 1.8
Pin Functions (1 / 4)
Classifications
Pin Name
Power supply
VCC
VCL
Clock
Operating mode
control
System control
CAC
On-chip emulator
Address bus
Data bus
Multiplexed bus
Bus control
VSS
XTAL
EXTAL
BCLK
XCIN
XCOUT
MD
RES#
CACREF
FINED
A0 to A23
D0 to D15
A0/D0 to A15/D15
RD#
WR#
WR0#, WR1#
BC0#, BC1#
Interrupt
CS0# to CS3#
WAIT#
ALE
NMI
IRQ0 to IRQ7
1. Overview
I/O
Input
—
Input
Output
Input
Output
Input
Output
Input
Input
Input
I/O
Output
I/O
I/O
Output
Output
Output
Output
Output
Input
Output
Input
Input
Description
Power supply pin. Connect it to the system power supply.
Connect this pin to the VSS pin via the 0.1 μF smoothing capacitor
used to stabilize the internal power supply. Place the capacitor close
to the pin.
Ground pin. Connect it to the system power supply (0 V).
Pins for connecting a crystal resonator. An external clock signal can
be input through the EXTAL pin.
Outputs the external bus clock for external devices.
Input/output pins for the sub-clock oscillator. Connect a crystal
resonator between XCIN and XCOUT.
Pin for setting the operating mode. The signal levels on this pin
must not be changed during operation.
Reset pin. This LSI enters the reset state when this signal goes low.
Input pin for the clock frequency accuracy measurement circuit.
FINE interface pin.
Output pins for the address.
Input and output pins for the bidirectional data bus.
Address/data multiplexed bus
Strobe signal which indicates that reading from the external bus
interface space is in progress.
Strobe signal which indicates that writing to the external bus
interface space is in progress, in single-write strobe mode.
Strobe signals which indicate that either group of data bus pins (D7
to D0, and D15 to D8) is valid in writing to the external bus interface
space, in byte strobe mode.
Strobe signals which indicate that either group of data bus pins (D7
to D0 and D15 to D8) is valid in access to the external bus interface
space, in single-write strobe mode.
Select signals for areas 0 to 3.
Input pin for wait request signals in access to the external space.
Address latch signal when address/data multiplexed bus is
selected.
Non-maskable interrupt request pin.
Interrupt request pins.
R01DS0041EJ0150 Rev.1.50
Oct 18, 2013
Page 14 of 221