English
Language : 

M66271FP Datasheet, PDF (14/28 Pages) Mitsubishi Electric Semiconductor – OPERATION PANEL CONTROLLER
M66271FP
Additional Function for LCD Module Built-in System
As all of the VRAM address in M66271FP are externally opened for addressing VRAM from MPU directly.
When consider the LCD module built-in system, connect pins are increased.
But M66271FP has an additional function for the LCD module built-in system by lessening connect pins.
Outline of the additional function for the LCD module built-in system.
• Interface pins with MPU
15 kinds of interface with MPU: A <4:1>, D <7:0>, IOCS, LWR, RD
• Method of accessing the internal VRAM
Access the internal VRAM through the VRAM address index register (IDXL, IDXH) and the data port register (DP)
which are used for I/O register.
The following show the process of accessing VRAM.
Setting to MPUSEL, BHE = "L"
Select VRAM address index register (IDXL,
IDXH), and write access address (14-bit) as
data.
Select Data port register (DP).
Reading/Writing data for appointed
VRAM address.
VRAM address is increased of +1.
No use pins set the following.
HWR = "H", MCS = "H", WAIT = open, MPUCLK = "L", MPUSEL = "L",
BHE = "L", A <0> = "L", A <13:5> = "L", D <15:8> = "L",
RESET = Power on reset or soft ware reset.
(In case of soft ware reset RESET = "H": set)
Enable to change IDXL and IDXH, even if either.
Access the DP after writing the mode register (DISP (R1 − D2)) = "0".
Always enable to access (CSES register = "0"), because the display
signal fix "H" or "L" in DISP = "0" and a term is no wait access.
Access DP without WAIT function.
VRAM address is automatically increased of +1, when finished
access to DP.
When access to continuous address, it doesn't need to set IDXL
and IDXH.
Application
MPU side
A <4:1>
D <7:0>
IOCS
LWR
RD
LCD side
M66271FP
Common
driver
Crystal
Oscillator
Graphic LCD PANEL
Segment driver
Note: LCD module of small size for only graphics
REJ03F0267-0200 Rev.2.00 Mar 18, 2008
Page 14 of 27