HD74LV163A_15 Datasheet, PDF (14/17 Pages) Renesas Technology Corp – Synchronous 4-bit Binary Counter (Synchronous Clear)

HD74LV163A
Waveform − 5
Cascade mode
(set to maximum count number)
ENT
50%
50%
VCC
GND
CARRY
tpLH
50%
tpHL
VOH
50%
VOL
Note: 1. Input waveform: PRR≤1 MHz, duty cycle 50%, t_r ≤3 ns, t _f ≤3 ns
Application
Cascade circuitry
H: COUNT
L : DISABLE
INPUTS
H: COUNT
L : DISABLE
CLR
CLK
LD A B C D
ENP
ENT
CARRY
CK
CLR QA QB QC QD
OUTPUT
INPUTS
LD A B C D
ENP
ENT
CARRY
CK
CLR QA QB QC QD
OUTPUT
INPUTS
LD A B C D
ENP
ENT
CARRY
CK
CLR QA QB QC QD
OUTPUT
to next stages
Rev.5.00 Jun. 04, 2004 page 12 of 14