M37271MF Datasheet, PDF (13/98 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M37271MF-XXXSP
M37271EF-XXXSP, M37271EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
sSFR2 area (addresses 20016 to 21F16)
: Nothing is allocated
: Fix this bit to “0” ( do not write “1”)
0 : “0” immediately after reset
1 : “1” immediately after reset
? : undefined immediately after reset
Address Register
20016 PWM0 register (PWM0)
20116 PWM1 register (PWM1)
20216 _{PWM2 register (PWM2)}
20316 _{PWM3 register (PWM3)}
20416
20516
20616
PWM4 register (PWM4)
PWM5 register (PWM5)
PWM6 register (PWM6)
20716
20816 ^{Clock run-in detect register (CRD3)}
20916 Clock run-in register (CR3)
20A16 PWM mode register 1 (PN)
20B16 PWM mode register 2 (PW)
20C16 _{Timer 5 (TM5)}
20D16 Timer 6 (TM6)
20E16
20F16 ^{Sync pulse counter register (SYC)}
21016 Data slicer control register 3 (DSC3)
21116 ^{Interrupt interval determination register (RI)}
21216 ^{Interrupt interval determination control register (RE)}
21316 ^{Serial I/O mode register (SM)}
21416 Serial I/O register (SIO)
21516
21616 Clock source control register (CS)
21716 I/O polarity control register (PC)
21816 Raster color register (RC)
21916 Extra font color register (EC)
21A16
21B16 Border color register (FC)
21C16 Window H register 1 (WH1)
21D16 Window L register 1 (WH1)
21E16 Window H register 2 (WH2)
21F16 Window L register 2 (WH2)
Bit allocation
State immediately after reset
b7
b0 b7
b0
?
?
?
?
?
?
? 00 00 00 0
CRD35 CRD34 CRD33 CRD32 CRD31
?
0 00 00 00 0
? ?? ?? ?? ?
POL
ENABLE _{? ? ? ? 0 ? ? 0}
PW6 PW5 PW4 PW3 PW2 PW1 PW0 0 ? ? ? ? ? ? ?
0716
FF16
?
SYC5 SYC4 SYC3 SYC2 SYC1 SYC0 ? ? 0 0 0 0 0 0
DSC37 DSC36 DSC35DSC34 DSC33 DSC32 DSC31 DSC30
0016
?
AD/INT3 INT3
SEL POL
RE5 RE4 RE3 RE2 RE1 RE0
0016
AD/INT3 INT3
SEL POL
RSME55 SM4 RSME33 RSME22 RSME11 SM0
0
00
00
0
0
0
?
?
AD/INT3
SEL
C^IPNOS^TL36
RCES5
CS4
RCES3
RCES2
CRSE1
CS0
0
??
??
?
?
?
AS_PDEL/_CINT₇3 _PIPNO_CTL3_{6 RPCE5 PC4 RPCE3 RPCE2 RPCE1 PC0 1 0 0 0 0 0 0 0}
AS_RDEL/I_CNT₇3 _RIPNO_CTL3_{6 REC5 RC4 RCE3 RCE2 REC1 RC0}
0016
AD/INT3 INT3
SEL POL
RE5
RE3 RE2 RE1
? ?? 00 0 0 0
?
FC4 FC3 FC2 FC1 FC0 _{? ? ? 0 0 0 0 0}
?
?
WH21 WH20 _{? ? ? ? ? ? ? ?}
WL21 WL20 _{? ? ? ? ? ? ? ?}
Fig. 5. Memory map of special function register 2 (SFR2) (1)
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