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R32C118_15 Datasheet, PDF (125/127 Pages) Renesas Technology Corp – RENESAS MCU | |||
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Revision History
R32C/118 Group Datasheet
Rev.
Date
Page
Description
Summary
2, 4 ⢠Modified expressions âMain clock oscillator stop/re-oscillation
detectionâ, âcalculation transferâ, âchained transferâ, and âinputs/
outputsâ in Tables 1.1 and 1.3 to âMain clock oscillator stop/restart
detectionâ, âcalculation result transferâ, âchain transferâ, and âI/O portsâ,
respectively
7
⢠Completed âunder developmentâ phase of versions D and P products
in Table 1.6
10, 15 ⢠Changed order of signals in Figures 1.3 and 1.4
11, 16 ⢠Changed order of timer pins âTB5IN/TA0INâ in Tables 1.7 and 1.11 to
âTA0IN/TB5INâ
21
⢠Changed expression âI2C busâ in Table 1.16 to âI2C-busâ
23
⢠Modified Note 1 of Table 1.18
Chapter 2. CPU
â
⢠Modified wording and enhanced description in this chapter
25
⢠Corrected a typo âR3R0â in line 3 of 2.1.1 to âR3R1â
Chapter 3. Memory
â
⢠Modified wording and enhanced description in this chapter
Chapter 4. SFRs
â
⢠Changed expressions âI2C Busâ and âI2C-Busâ to âI2C-busâ
34, 35, 37 ⢠Changed hexadecimal format of reset values for registers G1BCR0,
G2BCR0, and G0BCR0 in Tables 4.6, 4.7, and 4.9 to binary
41
⢠Changed register name âIncrement/Decrement Counting Select
Registerâ in Table 4.13 to âIncrement/Decrement Select Registerâ
43
⢠Corrected reset value âX00X X000bâ for AD0CON2 register in Table
4.15 to âXX0X X000bâ
53
⢠Modified register name âI2C Bus START Condition/STOP Condition
Control Registerâ in Table 4.25 to âI2C-bus START and STOP
Conditions Control Registerâ; Corrected reset values for the following
registers in: I2CSSCR, I2CCR1, I2CCR2, I2CSR, and I2CMR
64, 65, 78, ⢠Changed register name âCANi Acceptance Mask Register kâ in Tables
79
4.36, 4.37, 4.50, and 4.51 to âCANi Mask Register kâ
67, 81 ⢠Corrected reset value âXXXX XX00bâ for CiMSMR register in Tables
4.39 and 4.53 to â0000 0000bâ
Chapter 5. Electrical Characteristics
â
⢠Modified wording and enhanced description in this chapter
88
⢠Changed expression âProgramming and erasure endurance of flash
memoryâ in Table 5.8 to âProgram/erase cyclesâ; Changed its unit
âtimesâ to âCyclesâ
93, 106 ⢠Added âMSCLâ and âMSDAâ to Tables 5.16 and 5.42
94, 107 ⢠Modified description âDrive powerâ in Tables 5.17 and 5.43 to âDrive
strengthâ
100, 113 ⢠Corrected âINTiâ in the title of Tables 5.32 and 5.58 to âINTiâ
101, 104, ⢠Changed expression ârestart conditionâ in Tables 5.34, 5.39, 5.40,
114, 117 5.60, 5.65, and 5.66 to ârepeated START conditionâ
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