R32C118_15 Datasheet, PDF (104/127 Pages) Renesas Technology Corp – RENESAS MCU

R32C/118 Group
5. Electrical Characteristics
V_CC = 5 V
Switching Characteristics (V_CC = 4.2 to 5.5 V, V_SS = 0 V, and T_a = T_opr, unless otherwise noted)
Table 5.37 Serial Interface
Symbol
Characteristic
t_d(C-Q)
t_h(C-Q)
TXDi output delay time
TXDi output hold time
Measurement
Value
Condition _{Min. Max.}
Unit
Refer to
Figure 5.6
0
80
ns
ns
Table 5.38 Intelligent I/O
Symbol
Characteristic
t_{d(ISCLK2-TXD)}
t_{h(ISCLK2-RXD)}
ISTXD2 output delay time
ISTXD2 output hold time
Measurement
Value
Condition _{Min. Max.}
Unit
Refer to
180
ns
Figure 5.6
0
ns
Table 5.39 Multi-master I²C-bus Interface (standard-mode)
Symbol
Characteristic
Measurement
Condition
Value
Min.
Max.
Unit
t_f(SCL)
MSCL output fall time
2
ns
t_f(SDA)
MSDA output fall time
2
ns
t_d(SDA-SCL)S MSCL output delay time after START
condition/repeated START condition
t_d(SCL-SDA)P Repeated START condition/STOP
condition output delay time after
MSCL becomes high
Refer to
Figure 5.6
20 × t_c(IIC) - 120 52 × t_c(IIC) - 40 ns
20 × t_c(IIC) + 40 52 × t_c(IIC) + 120 ns
t_d(SCL-SDA) MSDA output delay time
2 × t_c(IIC) + 40 3 × t_c(IIC) + 120 ns
Table 5.40 Multi-master I²C-bus Interface (fast-mode)
Symbol
Characteristic
Measurement
Condition
Value
Min.
Max.
Unit
t_f(SCL)
MSCL output fall time
2 ⁽¹⁾
ns
t_f(SDA)
MSDA output fall time
2 ⁽¹⁾
ns
t_d(SDA-SCL)S MSCL output delay time after START
condition/repeated START condition
t_d(SCL-SDA)P Repeated START condition/STOP
condition output delay time after
MSCL becomes high
Refer to
Figure 5.6
10 × t_c(IIC) - 120 26 × t_c(IIC) - 40 ns
10 × t_c(IIC) + 40 26 × t_c(IIC) + 120 ns
t_d(SCL-SDA) MSDA output delay time
2 × t_c(IIC) + 40 3 × t_c(IIC) + 120 ns
Note:
1. External circuits are required to satisfy the I²C-bus specification.
R01DS0065EJ0120 Rev.1.20
Feb 6, 2013
Page 104 of 123