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S3A7 Datasheet, PDF (12/133 Pages) Renesas Technology Corp – 32-bit ARM Cortex-M4 microcontroller
S3A7
Function
GPT
AGT
RTC
SCI
IIC
SSI
1. Overview
Signal
GTETRGA,
GTETRGB,
GTETRGC,
GTETRGD
GTIOC0A to
GTIOC9A,
GTIOC0B to
GTIOC9B
GTIU
GTIV
GTIW
GTOUUP
GTOULO
GTOVUP
GTOVLO
GTOWUP
GTOWLO
AGTEE0, AGTEE1
AGTIO0, AGTIO1
AGTO0, AGTO1
AGTOA0, AGTOA1
AGTOB0, AGTOB1
RTCOUT
RTCIC0 to RTCIC2
SCK0 to SCK4,
SCK9
RXD0 to RXD4,
RXD9
TXD0 to TXD4,
TXD9
CTS0_RTS0 to
CTS4_RTS4,
CTS9_RTS9
SCL0 to SCL4,
SCL9
SDA0 to SDA4,
SDA9
SCK0 to SCK4,
SCK9
MISO0 to MISO4,
MISO9
MOSI0 to MOSI4,
MOSI9
SS0 to SS4, SS9
SCL0 to SCL2
SDA0 to SDA2
SSISCK0
SSISCK1
SSIWS0
SSIWS1
SSITXD0
SSIRXD0
SSIDATA1
AUDIO_CLK
I/O
Input
I/O
Input
Input
Input
Output
Output
Output
Output
Output
Output
Input
I/O
Output
Output
Output
Output
Input
I/O
Input
Output
I/O
I/O
I/O
I/O
I/O
I/O
Input
I/O
I/O
I/O
I/O
Output
Input
I/O
Input
Description
External trigger input pin.
Input capture, Output capture, or PWM output pin.
Hall sensor input pin U.
Hall sensor input pin V.
Hall sensor input pin W.
Three-phase PWM output for BLDC motor control (positive U phase).
Three-phase PWM output for BLDC motor control (negative U phase).
Three-phase PWM output for BLDC motor control (positive V phase).
Three-phase PWM output for BLDC motor control (negative V phase).
Three-phase PWM output for BLDC motor control (positive W phase).
Three-phase PWM output for BLDC motor control (negative W phase).
External event input enable.
External event input and pulse output.
Pulse output.
Output compare match A output.
Output compare match B output.
Output pin for 1-Hz/64-Hz clock.
Time capture event input pins.
Input/output pins for the clock (clock synchronous mode).
Input pins for received data (asynchronous mode/clock synchronous
mode).
Output pins for transmitted data (asynchronous mode/clock synchronous
mode).
Input/Output pins for controlling the start of transmission and reception
(asynchronous mode/clock synchronous mode), active LOW.
Input/output pins for the IIC clock (simple IIC).
Input/output pins for the IIC data (simple IIC).
Input/output pins for the clock (simple SPI).
Input/output pins for slave transmission of data (simple SPI).
Input/output pins for master transmission of data (simple SPI).
Slave-select input pins (simple SPI), active LOW.
Input/output pins for clock.
Input/output pins for data.
SSI serial bit clock pin.
Word select pins.
Serial data output pins.
Serial data input pins.
Serial data input/output pins.
External clock pin for audio (input oversampling clock).
R01DS0263EU0100 Rev.1.00
Feb 23, 2016
Page 12 of 130