M5M29KB Datasheet, PDF(11/32 Page) Renesas Technology Corp – CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY

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M5M29KB Datasheet, PDF (11/32 Pages) Renesas Technology Corp – CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY

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Renesas LSIs

M5M29KB/T331AVP

33,554,432-BIT (4,194,304-WORD BY 8-BIT /2,097,152-WORD BY 16-BIT)

CMOS 3.3V-ONLY, BLOCK ERASE FLASH MEMORY

Software Command Definition

Command List (WP# =VIH or VIL)

Command

Read Array

Page Read

Device Identifier

Read Status Register

Clear Status Register

Suspend

Resume

1st Bus Cycle

Mode Address

Data1)

(DQ0-15),(DQ0-7)

Write X

FFH

Write

Bank2)

F3H

90H

70H

Write

Bank2)

50H

B0H

D0H

Mode

Read

2nd Bus Cycle

Address

Data

A20-A18 A0 (DQ0-15),(DQ0-7)

3rd-5th Bus Cycles (Word mode)

3rd-9th Bus Cycles (Byte mode)

Mode Address

Data

(DQ0-15),(DQ0-7)

SA5)

Bank2) IA3)

Bank2)

RD05)

ID3)

SRD4)

Read SA+i6)

RDi6)

1) In the case of Word mode(BYTE#=VIH), upper byte data (DQ15-DQ8) is ignored.

2) Bank=Bank address (Bank(I)-Bank(IV): A20-18)

3) IA=ID code address: A0=VIL (Manufacturerâs code): A0=VIH (Device code), ID=ID code

4) SRD=Status Register Data

5) SA=A20-A2: Page Address, A1, A0(A1-A-1):voluntary address / RD0=1st Page read data

6) SA+i: Page address(is equal to 1st Page Address of A20-A2), A1,A0(A1-A-1): voluntary address / RDi: 2nd Page read data

Command List (WP# =VIH)

Command

Word Program

Page Program

Page Buffer to Flash

Block Erase/Confirm

Erase All Unlocked Blocks

Clear Page Buffer

Single Data Load to Page Buffer

Flash to Page Buffer

1st Bus Cycle

Mode Address

Data1)

(DQ0-15),(DQ0-7)

Write Bank2)

40H

Write Bank2)

41H

Write Bank2)

0EH

Write Bank2)

20H

Write X

A7H

Write X

55H

Write Bank2)

74H

Write Bank2)

F1H

Mode

Write

2nd Bus Cycle

3rd-129th Bus Cycles (Word mode)

3rd-257th Bus Cycles (Byte mode)

Address

WA3)

WA04)

WA5)

BA6)

WA3)

RA7)

Data1)

(DQ0-15),(DQ0-7)

WD3)

WD04)

D0H1)

WD3)

D0H1)

Mode Address

Data1)

(DQ0-15),(DQ0-7)

Write WAn4)

WDn4)

1) In the case of Word mode(BYTE#=VIH),Upper byte data (DQ15-DQ8) is ignored.

2) Bank=Bank address (Bank(I)-Bank(IV): A20-A18)

3) WA=Write Address, WD=Write Data

4) WA0, WAn=Write Address, WD0, WDn=Write Data.

Word mode (BYTE#=VIH) : Write address and write data must be provided sequentially from 00H to 7FH for A6-A0.

Page size is 128 words (128-word x 16-bit), and also A20-A7 (block address, page address) must be valid.

Byte mode (BYTE#=VIL) : Write address and write data must be provided sequentially from 00H to FFH for A6-A-1.

Page size is 256 Bytes (256-byte x 8-bit), and also A20-A7 (block address, page address) must be valid.

5) WA=Write Address: A20-A7 (block address, page address) must be valid.

6) BA=Block Address : A20-A12[Bank(I)], A20-A15 [Bank(II), Bank(III), Bank(IV)] must be valid.

7) RA=Read Address: A20-A7 (block address, page address) must be valid.

Rev.1.0_48a_bezz

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